The complexity of design, particularly for integrated RF and baseband SoC chips, significantly impacts the chip’s performance, sensitivity, power consumption, size and cost, etc. These differences generated during design directly affect the core competitiveness of navigation and positioning terminal products. Therefore, enterprises laid strong emphasis on highly integrated design, performance improvement, and multi-dimensional power consumption control in the process of researching and developing the Beidou chip technology.

QFN40

WLCSP

The recently launched Allystar’s HD8140 series is based on the state of art CYNOSURE IV, SoC architecture, which integrates two microprocessors, multi-band multi-system GNSS RF and baseband, two memories, an intelligent power management unit, and peripheral interfaces onto a single chip. This design features a high degree of integration, robust functionality, low power consumption, and compact size. Thus, customers can expect a sub-meter level position accuracy, higher sensitivity, improved jammer resistance and multipath, lower power consumption, and optimal support for existing differential services, enabling global applications. This series can be widely used in mobile phones, wearable devices, unmanned aerial vehicles, vehicle navigation and management, unmanned driving, marine navigation, GIS data acquisition, engineering survey, etc.